Micron is almost ready to ship its world’s first 232-layer 3D NAND flash memory to its OEMs around the world. The details!
Micron through a press release on its website later taken up by some US newspapers, it announced the (almost imminent) arrival of one memoria 3D NAND flash con 232 layer before the end of the year. A true record of production technology. The US company spoke of higher performance, but in the face of lower consumption, the classic formula sought in this field in terms of architectural innovation. Also announced an interesting novelty, even if complex, or 360 degree compatibility with controller of third parties.
The use? From SSDs to specific sectors where a high-efficiency memory implementation is required, which should be finished by the end of the year. The memories chosen are TLCs, which have a capacity to condense up to 1 Terabit.
The new architecture will consist of a Chip based on CMOS under array architecture, the same that we can find on 176-layer architectures, but significantly improved.
Record Micron: a breve memorie 3D NAND flash a 232 layer
Greater density, and lower consumption, as shown by the graphs shown, the goal was to cope with the greater demand for increasingly lower latency by the market, therefore in increasing the bandwidth. However, with the same production process, in fact at least looking at the production process, and the higher efficiency, we should expect lower prices, at least as regards the internal production costs, we do not know the impact on the market that will take. .
According to Scott DeBoer, executive vice president of the Technology and Products division, the new memories may, at least not in the first versions, be optimized and implemented in the smartphone sector. According to roadmap shown, solutions will arrive later with “3x” e “4x” layer. If you want to continue to know the latest news from the hardware world, keep following us. Greetings from TechGameWorld.com.
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